Menta, Cioni, Aiudi, Polini, and Giovannetti [Phys. Rev. Research 7, L012065 (2025)] proposed a universal superconducting quantum computer in which a two-dimensional ladder of three transmon species is driven only by a few species-selective global microwave pulses, with always-on nearest-neighbor ZZZZ couplings and an interaction blockade providing effective addressing; quantum information resides in a single N-qubit information carrier column (ICC) that is transported through the ladder by collective pulse sequences. The authors left the architecture's fault-tolerance agenda open: no error-correcting scheme executable with these global primitives exists for the ICC encoding, no error threshold has been derived under its realistic noise (fabrication disorder, decoherence, control imperfections), and the fabrication-tolerance window for qubit frequencies and couplings is unquantified. Follow-up work by the same collaboration has quantified static-disorder and decoherence degradation separately and built globally controlled error correction for a different XY-ring machine, but the threshold question for the ZZ ladder itself remains open. The problem is to settle, quantitatively, whether this globally driven architecture can operate fault-tolerantly: construct and analyze globally driven error correction for the ICC encoding, derive its error threshold under a combined realistic noise model, and quantify the inhomogeneity window compatible with that threshold.

Background

In conventional superconducting quantum processors, every qubit (typically a transmon — a nonlinear superconducting resonant circuit whose two lowest levels encode a qubit) is wired to its own microwave drive and readout resonator. Scaling to the millions of qubits needed for fault tolerance creates the so-called wiring problem: control-line congestion, heat load at cryogenic temperatures, and calibration complexity all grow superlinearly. Global control is an alternative paradigm in which a small number of external fields address the entire register at once, and effective single-qubit addressing emerges from architectural structure rather than local wiring. After early theoretical work by Lloyd and by Benjamin and coworkers, the idea was recently revived in hardware-relevant form: Cesa and Pichler [Phys. Rev. Lett. 131, 170601 (2023)] showed universal computation in globally driven two-species Rydberg atom arrays (Rydberg atoms are atoms excited to high-lying electronic states, whose strong state-dependent interactions enable blockade-style selective addressing), and Menta et al. [Phys. Rev. Research 7, L012065 (2025)] translated the strategy to superconducting circuits.

The architecture audited here (Menta et al., 2025) is a two-dimensional ladder hosting three species of superconducting qubits, AA, BB, and CC, with distinct transition frequencies. Nearest-neighbor qubits are always coupled by a longitudinal ZZZZ interaction (an always-on coupling that shifts transition energies conditional on the neighbor's state, of strength ζ\zeta); the species-selective global drives VA(t)V_A(t), VB(t)V_B(t), VC(t)V_C(t) have Rabi frequency Ωχ\Omega_\chi (the rate at which a resonant microwave pulse rotates species χ\chi). When ζ≫Ωχ\zeta \gg \Omega_\chi (numerically, ζ≳5 Ωχ\zeta \gtrsim 5\,\Omega_\chi), the doubly excited state of a coupled pair is detuned out of resonance — a blockade regime — so that a global pulse flips only the qubit of the addressed species whose neighbor is not excited. Quantum information is always localized in one N-qubit vertical column, the information carrier column (ICC), while all other qubits stay in a separable reference state; global pulse sequences transport the ICC along the ladder and implement single-qubit rotations and ZZZZ-induced conditional-phase entangling gates, which together yield universality on NN logical qubits using Ntot=2N2+4N−1N_{\mathrm{tot}} = 2N^2 + 4N - 1 physical qubits and O(1)O(1) control lines. The largest experimentally realized ζ\zeta is of order 100 MHz, so the blockade regime is compatible with Rabi frequencies of a few MHz. Readout, however, is currently possible only at one end column of the ladder.

Fault tolerance is the unresolved issue. For globally controlled arrays it is known, from Bririd, Benjamin, and Kay [arXiv:quant-ph/0308113], Kay [arXiv:quant-ph/0504197; arXiv:quant-ph/0702239], and Fitzsimons and Twamley [arXiv:0707.1119], that error correction and even a positive fault-tolerant threshold (the error rate below which enlarging the code suppresses logical errors) can be achieved — but only by running two interleaved correction procedures, one for the computational qubits and one for the many auxiliary (ancillary) qubits, i.e. the extra non-computational qubits that such architectures need for addressing. This duplication carries a large time and qubit overhead, and the resulting thresholds are extremely small; whether such dual schemes are viable within realistic hardware and timing constraints has been questioned. In the ICC ladder the situation is acute: the vast majority of the ∼2N2\sim 2N^2 physical qubits are non-computational, standard surface-code (a topological stabilizer code storing logical qubits in a two-dimensional grid of local parity checks) or quantum low-density parity-check (qLDPC) syndrome extraction (the repeated measurement of code parity checks to diagnose errors) assumes locally addressable ancillary qubits, and fabrication disorder — inhomogeneous qubit frequencies and coupling strengths — plus decoherence and control imperfections act on every physical qubit. The authors state that globally driven error-correcting codes for this machine, the required tolerance calculation, and a detailed noise analysis are left to future research.

Problem Statement

For the globally driven superconducting ladder architecture of Menta et al. (Phys. Rev. Research 7, L012065 (2025)) — three transmon species with species-selective global drives, always-on nearest-neighbor ZZZZ couplings of strength ζ\zeta in the blockade regime ζ≳5Ωχ\zeta \gtrsim 5\Omega_\chi, and quantum information carried by a single transportable N-qubit information carrier column (ICC) — establish quantitatively whether the architecture can operate fault-tolerantly. An affirmative resolution requires all three of the following jointly supporting deliverables: (1) an explicit error-correcting scheme (surface-code-, qLDPC-, or otherwise tailored construction) whose encoding, syndrome extraction, and decoding are executable with the architecture's native primitives only — species-global pulses, always-on ZZZZ interactions, blockade-protected selectivity, ICC transport, and single-column readout — including a stated treatment of the non-computational (auxiliary) physical qubits that constitute most of the device; (2) an error threshold — the error rate below which enlarging the code suppresses logical errors — for that scheme under a realistic noise model combining fabrication-induced static disorder (inhomogeneous qubit frequencies and ZZZZ couplings), decoherence (amplitude damping and dephasing, i.e. energy relaxation and random phase noise), and control imperfections, established analytically or by simulation with system-size analysis; and (3) a quantitative fabrication-tolerance window — the allowable inhomogeneity ranges in qubit frequencies and coupling strengths (with or without pulse optimization) for which global pulse sequences achieve logical-operation fidelities compatible with the derived threshold. A resolution may equally be reached by a rigorously supported negative result: a proof that no error-correcting scheme whose encoding, syndrome extraction, and decoding are executable with the architecture's native primitives alone can achieve a non-zero error threshold under the stated noise model. Either outcome settles the single overarching question: can this O(1)O(1)-control-line architecture reach fault tolerance, and under what hardware parameters.

References

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