The shuttling-based distributed quantum computing architecture SDQC (Baek, Lee, Min, and Kim, arXiv:2512.02890, 2025) combines deterministic ion shuttling with distributed quantum computing to scale trapped-ion quantum processors, and evaluates logical error rates against the QCCD and photonic distributed architectures. The authors themselves leave its fault-tolerance analysis incomplete: non-Clifford gates lack an integrated magic-state factory, inter-block transversal gates are simulated with a simplifying local-depolarizing idling model instead of correlated errors and joint decoding, logical error rates below ~10^-8 are extrapolated rather than simulated, and only one quantum error-correcting code family was evaluated. This problem asks to complete that analysis: integrate a fault-tolerant magic-state supply into the architecture, replace the idling approximation with a correlated-error simulation and joint multi-block decoder and quantify the correction, validate the extrapolated low-error fits, and assess alternative codes and decoders for code-architecture co-optimization. No resolution of any of these components is known in the literature to date.

Background

Trapped-ion quantum computers encode qubits in the internal states of ions held in electromagnetic traps; a single ion chain can hold only tens of qubits, so large-scale machines must be modular. Two modular families define the design space. In a QCCD (Quantum Charge-Coupled Device) architecture, ions are physically transported (shuttled) between zones of a segmented chip trap by time-varying voltages; operations are deterministic and high-fidelity, but shuttling time and losses at junction crossings grow with machine scale. In photonic distributed quantum computing (DQC), separate modules are linked by photonic Bell pairs (pairs of qubits sharing a maximally entangled state) consumed via gate teleportation (a Bell pair plus measurements implements a non-local quantum gate); entanglement distribution is asynchronous and its time cost is scale-independent, but the photonic links are probabilistic and noisier. The SDQC (Shuttling-based Distributed Quantum Computing) architecture of Baek, Lee, Min, and Kim (arXiv:2512.02890) is a hybrid: entangled ion qubit pairs are produced in entanglement factories, delivered to processor nodes by deterministic shuttling along a unidirectional path, and measured in detectors, giving deterministic delivery with the pipelining and parallelism advantages of distributed computing. Logical qubits are protected by the two-dimensional color code, a stabilizer quantum error-correcting code defined on a trivalent three-colorable lattice whose faces carry both X- and Z-type parity checks; its key virtue is that every Clifford gate (Hadamard, phase, CNOT) acts transversally, i.e. bitwise on the physical qubits, and SDQC implements these transversal logical gates between logical qubits by parallel remote two-qubit gate-teleportation operations across nodes. A superdense-coding-based syndrome-extraction circuit — so named because, as in superdense coding (which conveys two classical bits using one physically transmitted qubit plus a shared Bell pair), each face's X- and Z-type checks are measured through Bell-pair ancillas — allows stabilizer measurements to be segmented across processor nodes, letting one logical qubit span multiple nodes without local connectivity. The paper simulates architecture-specific error-correction circuits (up to code distance 13, node capacity 60 qubits) with a concatenated minimum-weight perfect matching (MWPM) decoder — a decoding heuristic that pairs error detections by matching — and fits the logical error rate pLp_L to the ansatz pL=Aptransαd+B(1/λSE)βdp_L = A p_{\mathrm{trans}}^{\alpha d} + B (1/\lambda_{\mathrm{SE}})^{\beta d}, where dd is the code distance, ptransp_{\mathrm{trans}} the inter-block two-qubit gate error rate, and λSE\lambda_{\mathrm{SE}} a uniform improvement factor for syndrome-extraction operations. Two structural gaps remain. First, a universal quantum computer needs non-Clifford gates (such as the T gate), which fault tolerance forbids implementing transversally in this setting; they require magic states — special resource states consumed by injection — which must be produced at low error rate by distillation or cultivation (low-overhead production methods exist: magic-state cultivation by Gidney, Shutty, and Jones, arXiv:2409.17595, and distillation tailored to color codes by Lee, Thomsen, Fazio, Brown, and Bartlett, PRX Quantum 6, 030317 (2025)), and SDQC left the factory design and its placement and throughput budget open. Second, the simulations replace each noisy inter-block transversal gate with local idling noise of rate (4/5)p(4/5)p on every physical qubit of a block, deliberately discarding error correlations that propagate between code blocks; the authors note that correct treatment 'ideally requires sophisticated correlated decoders jointly involving multiple code blocks' and cite the demonstration of correlated decoding of transversal gates in neutral-atom experiments (Cain et al., Phys. Rev. Lett. 133, 240602 (2024)), where decoding logical qubits jointly rather than independently substantially improves algorithm performance; but no such treatment exists for color-code blocks distributed across shuttling-linked ion-trap nodes. Simulations were also limited to logical error rates above ~10−810^{-8}, with lower values obtained by extrapolating the fitted ansatz, and the architecture was evaluated with a single code family and decoder, leaving code–architecture co-optimization unexplored.

Problem Statement

Complete the fault-tolerance analysis and quantitative validation of the SDQC shuttling-based distributed trapped-ion architecture, as explicitly left open by its authors. Concretely, with the common objective of establishing a quantitatively validated, fully fault-tolerant logical-error and resource account of SDQC (the components jointly determine any architecture-level claim about it): (1) Correlated inter-block error model: replace the simplification in which each noisy transversal gate between code blocks is modeled as local depolarizing idling of rate (4/5)ptrans(4/5)p_{\mathrm{trans}} per physical qubit with an explicit simulation of error propagation across the distributed superdense color-code blocks, and construct or adapt a joint (correlated) decoder over multiple code blocks; quantify how much this changes the logical error rate pL(ptrans,λSE,d)p_L(p_{\mathrm{trans}}, \lambda_{\mathrm{SE}}, d), the fitted parameters A,B,α,βA, B, \alpha, \beta, the crossover behavior, the conservative success-rate estimates used in the application analysis, and the architecture comparison against photonic DQC and QCCD. (2) Magic-state factory integration: design the fault-tolerant, high-throughput magic-state factory (e.g. cultivation or distillation on color codes), its architectural placement on the shuttling path, and its provisioning within SDQC's pipelined fault-tolerant cycle, so that non-Clifford gates are supported without violating the throughput and space-cost assumptions; report the resulting logical clock speed and resource overheads for a universal computation benchmark. (3) Extrapolation validation: extend the logical-error simulations below the ∼10−8\sim 10^{-8} floor (or provide a certified argument) and determine whether the fitted ansatz pL=Aptransαd+B(1/λSE)βdp_L = A p_{\mathrm{trans}}^{\alpha d} + B(1/\lambda_{\mathrm{SE}})^{\beta d} remains valid in the extrapolated regime used for the application-level conclusions, characterizing any deviations. (4) Code–architecture co-optimization: evaluate SDQC's performance under alternative quantum error-correcting codes and decoders (e.g. surface-code variants and improved color-code decoders) under architecture-specific circuit constructions, identifying which code/decoder combinations the shuttling-based distribution favors. These four components are jointly required: partial completion of any one does not resolve the task, and each must be treated concretely — a specified model, decoder, design, or bounded evaluation with its quantified outcomes and reported overheads — rather than qualitatively. Hardware realization of the assumed component performance is an engineering prerequisite outside the scientific scope of this problem.

References

  1. Seunghyun Baek, Seok-Hyung Lee, Dongmoon Min, Junki Kim, SDQC: Distributed Quantum Computing Architecture Utilizing Entangled Ion Qubit Shuttling, arXiv:2512.02890 (2025), DOI 10.48550/arXiv.2512.02890, https://arxiv.org/abs/2512.02890 (primary source)
  2. Madelyn Cain, Chen Zhao, Hengyun Zhou, Nadine Meister, J. Pablo Bonilla Ataides, Arthur Jaffe, Dolev Bluvstein, Mikhail D. Lukin, Correlated decoding of logical algorithms with transversal gates, Phys. Rev. Lett. 133, 240602 (2024), DOI 10.1103/PhysRevLett.133.240602, arXiv:2403.03272, https://arxiv.org/abs/2403.03272
  3. Madelyn Cain, Dolev Bluvstein, Chen Zhao, Shouzhen Gu, Nishad Maskara, Marcin Kalinowski, Alexandra A. Geim, Aleksander Kubica, Mikhail D. Lukin, Hengyun Zhou, Fast correlated decoding of transversal logical algorithms, arXiv:2505.13587 (2025), https://arxiv.org/abs/2505.13587
  4. Craig Gidney, Noah Shutty, Cody Jones, Magic state cultivation: growing T states as cheap as CNOT gates, arXiv:2409.17595 (2024), https://arxiv.org/abs/2409.17595
  5. S.-H. Lee, F. Thomsen, N. Fazio, B. J. Brown, S. D. Bartlett, Low-Overhead Magic State Distillation with Color Codes, PRX Quantum 6, 030317 (2025), DOI 10.1103/ch5r-cnfq, https://doi.org/10.1103/ch5r-cnfq
  6. Michael Silver, Zachary Vernec, Hans-Arno Jacobsen, Q-DICE: Quantum Distributed Interconnect Compiler and Emulator, arXiv:2606.11340 (2026), https://arxiv.org/abs/2606.11340