Semiconductor spin qubits have demonstrated individually every ingredient required for quantum computation in the standard DiVincenzo criteria (well-defined qubits, initialization, a universal gate set, long coherence, and readout) — above 99.9% single-qubit gates, above 99% two-qubit gates, and above 99% single-shot readout — but only in devices of one to a few qubits. The open problem, posed explicitly by the six-qubit silicon processor of Philips et al. (2022), is to achieve high fidelities for all components at the same time while enlarging the qubit count: an array of more than six gate-defined qubits combining high-fidelity initialization and single-shot readout for every qubit, reservoir-free operation, selective addressing and high exchange on/off ratios under crosstalk and dense qubit-frequency spectra, and control sequences robust to parameter drift and microwave heating. As of 2026 no semiconductor spin-qubit array has met this integrated objective: the largest universal circuit on gate-defined dots is still six qubits, while the larger arrays reported (18-qubit germanium, 18-qubit exchange-only silicon, 11-qubit donor registers) each leave at least one component — typically two-qubit gate fidelity across the array or full universal operation — below the levels established in small systems.

Background

A quantum-dot spin qubit stores quantum information in the spin state of a single electron confined in an electrostatically defined quantum dot in a semiconductor heterostructure such as Si/SiGe or strained germanium; isotopic purification of the host lattice suppresses magnetic noise from nuclear spins. Single-qubit gates are usually driven by electric-dipole spin resonance (EDSR), in which an applied microwave electric field, converted to an effective magnetic drive by a field gradient from a micromagnet, rotates the spin. Two-qubit gates rely on the exchange interaction, a controllable spin-spin coupling JijJ_{ij} between neighboring dots, switched by gate electrodes: a large on/off ratio of JijJ_{ij} (for example >100) is needed so that idle qubit pairs do not accumulate unwanted entangling phases while a targeted pair is gated. Readout is typically single-shot: Pauli spin blockade (PSB) converts the spin state of a dot pair into a metastable charge configuration that a charge sensor can distinguish, and quantum-non-demolition (QND) variants leave the measured state intact so it can be re-measured. Historically, most quantum-dot demonstrations suffered from low initialization or readout fidelities, with typical readout visibilities of no more than 60–75% (visibility here is the amplitude of the measured spin oscillation, bounded by the product of initialization and readout fidelity), while state-of-the-art single-qubit gate fidelities above 99.9% and two-qubit gates above 99% were achieved only in one- and two-qubit devices. In 2022 Philips et al. reported a six-qubit linear array in isotopically enriched silicon with universal operation: single-qubit gate fidelities near 99.8–99.9%, Bell-state fidelities of 89–95%, readout visibilities of 93.5–98%, and initialization by measurement with real-time feedback, which loads all spins into a chosen state without access to electron reservoirs (the large-doped contact regions normally used to load fresh electrons into dots), so the six electrons could be retained inside the array for over a month. Achieving the desired exchange on/off ratio required pulsing linear combinations of virtual barrier gates, and 108 crosstalk and drift parameters had to be tracked by automated calibration; the authors identified microwave-induced heating, which shifts qubit frequencies and shortens dephasing times, as the limiting factor for executing complicated circuits on many qubits. The paper states the field-level challenge directly: achieving high fidelities for all components while at the same time enlarging the qubit count, with its control concepts estimated to extend, without substantial modification, to roughly twice as long arrays and small two-dimensional arrays, beyond which cross-bar addressing and on-chip quantum links would be needed.

Problem Statement

In a gate-defined semiconductor quantum-dot spin-qubit array containing more than six qubits, achieve simultaneously: (1) universal operation — single-qubit gates at the ≳99.9% fidelity and two-qubit gates at the ≳99% fidelity already demonstrated individually in one- and two-qubit devices — for every qubit and every coupled qubit pair in the array; (2) high-fidelity initialization and single-shot readout of every qubit (≳99%, the level now reached in small devices, replacing the historical 60–75% visibility regime); (3) reservoir-free operation of the array, with electrons loaded and initialized without access to charge reservoirs and retained in the array throughout computation; (4) selective addressing of individual qubits and two-qubit gates with high exchange on/off ratios despite crosstalk and the increasingly dense qubit-frequency spectrum of a larger array; and (5) multi-qubit control sequences robust against parameter drift and microwave-induced heating, such that the error of a full circuit executed across the array does not exceed the error predicted by the component fidelities of the operations the circuit contains, 1−∏iFi1-\prod_i F_i, where FiF_i are the single-qubit, two-qubit, initialization and readout fidelities of those operations. This is the integrated scaling objective stated by the six-qubit silicon processor work — high fidelities for all components at the same time as the qubit count is enlarged — and it remains open: the largest universal circuit on gate-defined dots is still six qubits, and every larger array reported to date leaves at least one of these components below the levels established in small systems. A resolving answer is a concrete, quantitatively supported scheme for a specified gate-defined array of more than six qubits — its architecture, together with a control and calibration protocol and an error analysis showing that conditions (1)–(5) hold simultaneously — or an experimental demonstration of such an array; the five conditions are jointly mandatory, and meeting only a subset of them does not resolve the problem.

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