An on-wafer non-50 Ω measurement system can extract load-dependent X-parameter (behavioral) models of a 0.15 µm GaAs pHEMT directly at the probe tips and compare their predicted output-power and power-added-efficiency (PAE) contours against the foundry process design kit (PDK) compact model. The 2019 work that established this system reported only qualitative contour agreement, attributed residual deviations loosely to measured drain-current discrepancies in the nonlinear region, and provided no error metrics, no bias/load-dependence analysis, and no mechanism discrimination. The open problem is to quantitatively characterize the mismatch between on-wafer non-50 Ω X-parameter models and foundry PDK models (output power and PAE versus load impedance and bias), identify experimentally which candidate causes dominate (drain-current measurement error, tuner-path power-calibration residuals, probe contact repeatability, self-heating, PDK applicability, behavioral-extraction error), and refine the measurement or extraction so that the deviations attributable to them are reduced and the model comparison can support trustworthy nonlinear amplifier design.

Background

Power amplifiers (PAs) for microwave transmitters are designed around the large-signal behavior of an active device — here a 0.15 µm GaAs pseudomorphic high-electron-mobility transistor (pHEMT), a heterostructure FET used for power amplification at gigahertz frequencies. In operation the load impedance presented to the device is deliberately not the 50 Ω system impedance: designers use load-pull (systematically sweeping the load reflection coefficient ΓL\Gamma_L across the Smith chart while measuring output power and efficiency) to locate the optimum termination. Two kinds of device model support this design flow. A foundry process design kit (PDK) contains a compact model — a circuit-simulation model (e.g., Angelov-type or state-function I-V/Q-V formulations) whose parameters are extracted by the foundry and from which output-power and PAE contours can be simulated. A PHEMT's PAE (power added efficiency, the ratio of RF output power minus RF input power to DC power consumed) is especially demanding to predict because it divides by the DC drain current, so small DC prediction errors propagate directly into the PAE contour.

The measurement-based alternative is the X-parameter model, the commercial form of the poly-harmonic distortion (PHD) behavioral framework (Verspecht & Root 2006; Root et al. 2013). X-parameters are extracted with a nonlinear vector network analyzer (NVNA), which measures the phase-coherent spectral components of the incident and scattered waves at the fundamental and harmonics under large-signal drive; load-dependent extensions record the model functions versus the load reflection coefficient, so the model can predict device behavior under arbitrary terminations. Gunyan, Horn, Xu & Root (ARFTG 2009) established the validation methodology for arbitrary-load X-parameter and measurement-based device models. Two limitations frame this problem. First, conventional X-parameter extraction happens in an essentially 50 Ω environment, whereas a verification system should present controlled non-50 Ω impedances at the device plane; Hsiao, Tu & Chang (I2MTC 2018) built such a system with mechanical impedance tuners, but at coaxial connector planes, not at the on-wafer probe tips where bare die are characterized before packaging. Second, the PHD/X-parameter framework is quasi-static and single-tone: low-frequency dispersion (charge trapping in the FET surface and buffer) and electrothermal (self-heating) dynamics are outside its state variables, so deviations between an X-parameter model and a physics/empirical compact model in the strongly nonlinear regime are expected in principle but were not quantified for this measurement approach.

Hsiao, Tu, Tsai & Juang (APMC 2019) extended the group's system (earlier applied to mixer verification, APMC 2013) to the on-wafer plane: NVNA calibration by the two-port unknown-thru method with an on-wafer thru moved the reference planes to the probe tips, tuner-path insertion losses were characterized and embedded via the Focus Device Characteristic Suite (FDCS) software, and a thru standard validated the system over 64 combined source/load impedance states. Applied to a WIN Semiconductors 0.15 µm pHEMT (800 µm gate width) at 2.4 GHz, VDS = 5 V, gate biases −1.4 V and −1.0 V (drain currents 56 and 109 mA), with a 136-point load grid (∣ΓL∣|\Gamma_L| from 0 to 0.8), the measured output-power and PAE contours of the X-parameter model were reported to approximate those of the foundry PDK model — but only qualitatively ('good results in Smith chart'). The authors suggested the deviations stem from discrepancies between the measured drain-current consumption and the PDK model in the nonlinear region, yet supplied no quantitative error analysis. Related quantitative precedent exists only at low drive: Lee, Lin & Lin (IEEE MWCL 2016) showed for a 0.15 µm pHEMT at 2.4 GHz (VDS = 1.0 V, pump ≤ +10 dBm) that retaining the X-parameter mixing coefficients (X(T)X^{(T)} terms) reduces the deviation between X-parameter-predicted output power and measured load-pull data (from up to ~12% with hot-S parameters) — a comparison against measurement, not against a foundry PDK, and not in the power-bias regime of PA design. The Cardiff-model community (Husseini et al. 2018; Tasker 2020) has developed extraction and verification methodology for load-pull-based behavioral models generally, but does not treat on-wafer non-50 Ω X-parameter versus PDK deviations. The paper's specific discrepancy — its size as a function of bias and load, its causes, and how to remove it — was never followed up.

Problem Statement

For an on-wafer non-50 Ω X-parameter model verification system (impedance tuners with on-wafer probes, NVNA-calibrated with probe-tip reference planes), the 2019 source measurement of a WIN 0.15 µm pHEMT (800 µm gate width, 2.4 GHz, VDS = 5 V, gate biases −1.4 V and −1.0 V, source reflection coefficient ΓS=0\Gamma_S = 0, 136-point load grid with ∣ΓL∣≤0.8|\Gamma_L| \le 0.8) found that the X-parameter model's output-power and PAE contours deviate from those of the foundry PDK compact model by an unquantified amount, tentatively attributed to measured drain-current discrepancies in the nonlinear region. The open questions are how large that mismatch is — quantified by error metrics such as per-load-point output-power and PAE differences and contour displacement — how it depends on gate bias and load impedance, and what residual error would make the X-parameter-versus-PDK comparison usable for nonlinear amplifier design; which candidate cause experimentally dominates each deviation, discriminating among measurement-system, behavioral-extraction, and model-class origins of the candidate causes — measured DC drain-current error under large-signal drive, tuner-path power-calibration residuals (including the scalar additive-dB power computation at harmonic frequencies), probe-tip contact repeatability, self-heating during the continuous-wave sweep, inapplicability of the PDK model to the measured wafer, and behavioral-extraction error (e.g., load-grid density or truncation of the X(T)X^{(T)} mixing terms); and how the deviations traceable to the measurement system or to behavioral extraction can be reduced by refining the measurement system or model extraction and re-evaluating the error metrics, together with what the residual left by deviations traceable to model-class limits (for example the quasi-static single-tone scope of the PHD/X-parameter framework or PDK applicability) implies for using the verification system in nonlinear amplifier design. The answer need not reproduce the proprietary measured contour data or the foundry PDK compact model.

References

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